수직 GaN 기반 PN 다이오드에 대한 최근 진행 상황 검토

엣지 종료 기술

수직 GaN PND의 경우 BV 중요한 매개변수입니다. Almost all investigations on vertical GaN PNDs are centered on improving the withstanding voltage at reverse (i.e., BV ). However, due to the electric field crowding at the edge of PN junction, the depletion layer edge, or the electrode edge, premature breakdown often occurs. Therefore, to reduce the electric field crowding of the device, advanced device structure designs (i.e., edge termination techniques) are developed. Varied edge termination techniques have now been adopted to relax the electric field crowding at the edge of GaN PNDs for a higher BV . These techniques include mainly the field plate (FP), ion implantation and plasma treatment, and mesa etching in varied angle or steps and guard rings (GRs) [49, 67,68,69]. These features are discussed in this section.

Metal Field Plates

The FP has been widely utilized in GaN-based devices for transferring the peak electric field far from the edge of the gate, anode, or junction. This method has an identical feature to relax the intensity of the electric field at the PN edge under reverse bias. Moreover, the low leakage current and high breakdown voltage under reverse voltage can be achieved by using FP termination, which has a relatively simple fabricating process as well.

The merits of the FP structure include a simple fabrication process and compatibility with the device process. Simultaneously, the dielectric layer of FP is also the passivation layer of the device. As the earliest and most widely used edge termination for vertical GaN PNDs, the non-extended FP termination was initially used, as shown in Fig. 4a. For fabricating the FP structure, mesa structures were processed by inductively coupled plasma (ICP) dry etching. Then, to suppress the parasitic leakage currents from plasma damage, a passivation dielectric film was deposited all over the anode electrode and the entire mesa structure [70].

PNDs’ structures with a FP and extended passivation dielectric layer and b extended FP metal and passivation dielectric layer [70, 71]

To furtherly relax the electric field crowding at the periphery of the PN junction edge, the extended metal of the FP was utilized to cover the entire mesa to reduce the reverse leakage current and raise the BV [71]. This optimized FP structure is now widely employed in vertical GaN PNDs fabrications. As shown in Fig. 4b, the BV was raised over 3 kV with an extended FP structure. Meanwhile, the reverse leakage current was also suppressed to a quite low level at revere voltage of 3 kV.

As an essential component of the FP structure, the passivation layer has a considerable impact on the device characteristics. Thus, an appropriated passivation layer is essential. A passivation layer owned high-k permittivity is proposed by simulation, and uniform reverse current flow can be also obtained [50]. According to this theory, vertical GaN PNDs with FP termination using Ga₂ O₃ (the dielectric permittivity of 10) as passivation film were reported. The BV had a large improvement from 200 to 550 V, thereby revealing that a high-k permittivity film such as Ga₂ O₃ is promising as a passivation film of FP termination in vertical GaN PNDs for raising device characteristics [72]. However, some demerits arise for FP termination. The main issue is the defect during the dielectric layer deposition and interface between the dielectric and GaN, which result in carrier trapping. These would lead to the instability of device performance during long-term use. Therefore, the optimized deposition process of the dielectric layer must be investigated.

Mesa Termination

Mesa etching is an indispensable step to isolate adjacent devices in the fabrication of planar GaN-based devices. Given the simple process, this structure is popular for vertical GaN PND processes. Aside from a uniform electric field at the edge of PN junction, a high BV with nondestructive and avalanche characteristics can be achieved in PNDs. For instance, a simple but deep mesa structure can obtain great performance. As shown in Fig. 5a, with more than 10 µm depth of mesa structure in vertical PNDs, nondestructive BV and avalanche characteristics were confirmed [73].

아 PNDs with deeply etched mesa structure; ㄴ PNDs with two-step mesa [73, 74]

The novel mesa structures are investigated as shown in Fig. 5b. A multi-mesa (two-mesa) structure was adopted in vertical PNDs. With respect to the common single mesa structure, the two-mesa structure can shift the peak electric field from the edge of the PN junction to underneath the thinned p -GaN in the upper mesa because of the total depletion of holes in the thinned p -GaN layer. A high BV of 4.7–4.8 kV with nondestructive feature was successfully achieved by the two-mesa structure. Avalanche capability was obtained without lowering the forward I –V characteristics [74]. On the other hand, the two-mesa structure has the identical function for quasi-vertical PINDs [75]. The BV was enhanced from 665 to 835 V with the low leakage current simultaneously.

Besides the common perpendicular mesa structure, a mesa structure with negative bevel was recently proposed to mitigate the electric field crowding at edge of the PN junction. With the negative bevel mesa, the electric field at the edge has a decreasing trend when the bevel angle θ is lowered from 90˚. The peak electric field would be transferred into device inner. In [76], experimental investigation showed that beveled mesa structure (Fig. 6a) could induce a higher BV over 3 kV and a low leakage current with respect to BV of 3 kV in PNDs with steep mesa when using the same FP structure. Further investigation was performed by simulation using technology computer-aided design (TCAD). In vertical GaN PNDs with beveled mesa (Fig. 6b), the maximum electric field was determined by the acceptor concentration N _A in p -GaN, donor concentration N _D in n ^- -GaN drift layer, and θ of the beveled mesa. By theoretical analysis and simulation, the smaller θ could lead to higher E _pp (parallel-plane breakdown field). At the same time, a lightly doped p -GaN is beneficial for achieving high BV for a fixed θ of the beveled mesa. Taking θ  = 10° as an example, the experimental results support these findings. A parallel-plane breakdown field of 2.86 MV/cm was achieved, and this outcome is consistent with the simulation [77].

Schematic cross of PND structure with a bevel mesa and FP structure, b PND epitaxial structure is simulated by treating N _A , N _D 및 θ as variable [76, 77]

Similar with FP termination, the dry etching and/or insulator (or passivation film) is required in process of edge termination. Thus, the damage from dry etching must be considered and can cause a high reverse leakage current, even the premature breakdown. At the same time, it is a high demand to etched equipment for etched precision, and the etched depth is difficult to control. Meanwhile, the existence of damage generates a more complicated interface state between the insulator and the etched semiconductor, a situation that would affect device reliability. Consequently, reducing or alleviating damage is an inevitable issue. Now, some recipes (e.g., tetramethylammonium hydroxide (TMAH) and post-annealing that have the features of removing the damage by wet etching and repairing dry etching damage, respectively) have been adopted to treat etched surface to improve performance.

Ion Treatment

Ion implantation was employed to alleviate the electric field concentration near the edge. As a relatively simple termination structure, an implantation-based technique was investigated in GaN devices, which includes the compensating species (e.g., O, H, and Zn) or inert species (e.g., Ar, N, He, and Kr) to create deep-level traps in the termination regions [78,79,80,81,82]. Recently, for moderating the occurring of premature breakdown in vertical GaN PNDs, the ion implanted termination (e.g., N, F, Mg, and H) is also utilized. However, the mechanisms of these ion implanted terminations are different.

With respect to vertical GaN SBDs [83], N implantation in vertical GaN PNDs reveals a different mechanism, which entails creating the donor-like defects (N vacancy and N interstitial) to compensate for the p -type dopants. After processing by N implantation as shown in Fig. 7a and b, the conductivity of p -GaN can be reduced or eliminated (insulating) by N implantation [53]. To further improve the BV , a non-fully compensated layer was proposed, that is, a fully compensated layer coupled with a partially compensated counterpart in p -GaN. Thus, a higher BV was expected, and the mechanism was analyzed by simulation [84]. The experimental results show that N implantation with partially compensated p ⁺ -GaN could induce a BV of 1.68 kV without compromising the forward characteristics [85].

아 Cross-sectional plot of the PNDs with N implantation termination, and b 아니 implantation termination with fully and partially compensated [53, 84]

The hydrogen-plasma (H-plasma) edge termination can also reduce p -GaN conductivity, but with another mechanism. H-plasma treatment is an effective passivation method to transform the conductive p -GaN into a highly resistive one because of the strong bond of Mg-H in p -GaN. In contrast to N implantation, the H-plasma treatment is more appropriate for use in vertical GaN PNDs because of the low damage, low temperature, and simple operation involved. As shown in Fig. 8a, the PNDs exhibited an electric field of 3.0 MV/cm with just the H-plasma treatment. Simultaneously, the devices showed comparable forward I –V characteristics and a lower reverse leakage current [86].

아 Schematic view of PND structure by Mg ion treatment; ㄴ PNDs with H₂ plasma treatment [86, 88]

At the same time, fluorine (F) ion also has the capability of modulating the peak electric field due to the negative fixed charges when the device is under a reverse bias. Nevertheless, if the F implanted edge termination is carried out in vertical GaN PINDs, strict design and structural optimization are needed [87].

In addition to the N, H, and F ion implantation as edge terminations, Mg ion implantation is also an alternative method to convert the surface/interface state, which originates from the damage of ICP dry etching. A novel Mg ion implantation coupled with moat mesa was recently adopted to compensate for the donor-like damage for GaN vertical PNDs (Fig. 8b). Then, a BV of 1.5 kV was achieved with a specific on-state R _켜기 of 0.7 mΩ cm ² [88].

Ion implantation termination is an effective method for a high BV in vertical GaN PNDs. The ion implantation process is also relatively simple. However, crystal damage occurs during high-energy ion implantation. Moreover, post-annealing at high temperature is required in some of the ion implantation terminations for alleviating the crystal damage. The rectangle-shaped ion implantation profile is pursued, so the implantation depth must be controlled exactly. Finally, although the ion implantation process is simple, the equipment needed is costly due to usage of high energy ion.

Guard Rings

The use of floating guard rings (GR) as edge termination to improve BV is an effective method for vertical GaN PNDs, for which the reverse voltage has a voltage drop over the GR to relax the electric field crowding. At the same time, the GR fabrication process does not require a specialized step, which is synchronous with anode metal deposition. For a higher BV , a GR in the FP structure was fabricated in the PNDs (Fig. 9a), in which polyimide was set between the GR and anode portion as resistive device for a further voltage drop. Due to the resistance portion, an incremental 0.2–0.4 kV of BV to a maximum of 5.0 kV was obtained. Compared with normal PNDs without a GR structure, the device with a resistive GR exhibited a similar forward I –V characteristics with R _켜기 of 1.25 mΩ cm ² , but a lower reverse leakage current with BFOM of 20 GW/cm ² [69].

아 Vertical GaN PNDs structure with floating GR termination; ㄴ PNDs structure with H-implanted GRs [69, 90]

Besides the floating GR, the H-plasma-based GR structure was also applied to form the edge termination. In addition to low damage, the low diffusivity of H-plasma could result in relatively ideal profile in GaN [89]. Owing to passivation effect of the H-plasma on p -GaN, the conductive p -GaN becomes highly resistive, and the GR structure was subsequently formed by the highly resistive p -GaN ring (Fig. 9b). The narrow GR width of 1–2 µm and decreasing spacing were used to improve the BV. GR structures with varied rings were measured. The PNDs with varied rings have similar forward characteristics with around 0.65 mΩ cm ² and an ideality factor of 1.65 compared with those without GR. More GRs could further relax the electric field at the device edge. Thus, the devices exhibited a higher BV by increasing the number of rings after measurement. Consequently, the PNDs showed a BV of 1.7 kV with the highest electric field of 3.43 MV/cm 10 GRs [90].

The disadvantage of GR is its low area utilization rate, and the GR structure generally requires a large area, which is even bigger than anode. Then, the amount of GR raises the design difficulty such as the width and spacing of the GR. At present, two and more kinds of edge termination are adopted in single vertical GaN PNDs for a higher BV . These edge terminations typically include the FP, bevel mesa, and guard rings due to the relatively simple fabrications. On the other hand, these edge terminations are not meant to introduce the foreign element into the GaN crystal with respect to ion treatment, a feature that is beneficial for device performance. However, the quality of epitaxial layers still occupies a considerable proportion.

Vertical GaN PNDs on Si Substrate

To date, although vertical GaN-on-GaN devices exhibit excellent performance, the high cost and small diameter of GaN substrates still impede their large-scale market applications. Consider to the merit of a large scale and low cost of Si substrate, GaN-on-Si devices have attracted considerable many attentions at this stage.

For the quasi-vertical PND on Si substrate, high-quality buffer is essential. In [91], as shown in Fig. 10a, optimizing the AlN nucleation layer and the succeeding growth process, a GaN drift layer with a low threading dislocation density of 2.95 × 10 ⁸ cm ⁻² and high electron mobility of 720 cm ² /Vs was obtained. With the FP structure, the device has a BV of 820 V with R _켜기 of 0.33 mΩ cm ² .

아 Quasi-vertical PINDs with FP; ㄴ fully vertical PNDs by using the thin AlN and SLS superlattice structure on conductive Si substrate; ㄷ PNDs with trenched ohmic contact on back; d PNDs fabricated by layer transfer technology [91,92,93,94]

In addition to the challenge of materials mismatch, the conductive buffer layer and Si substrate are fundamental for fully vertical PNDs on Si substrate. In Fig. 10b, a n ⁺ -type Si substrate was first utilized as the cathode of vertical PNDs. Subsequently, the Si-doped thin AlN layer and GaN/AlN strained superlattice layer were employed to facilitate device performance [92]. Vertical PNDs on Si substrate are proposed with FP, and a BV of 288 V is confirmed with a drift layer of 1.5 µm. Moreover, a higher BV of 720 V in PNDs on Si with 5.7 µm drift layer is reported in Fig. 10c [93]. Unlike the conductive Si substrate method, the cathode ohmic on back approach was made by a trench, which reaches the n ⁺ -GaN layer through the selective removal of regular Si substrate and buffer layer.

Besides the conductive Si substrate and trenched ohmic contact on back, substrate removal technology is an alternative method to produce vertical GaN PNDs on Si substrates. In Fig. 10d, a layer transfer technology is used to process vertical PINDs on Si substrate. After Si substrate removal, transfer, n -electrode, and sidewall passivation, the devices exhibit a low R _켜기 of 3.3 mΩ cm ² and BV of 350 V [94]. The high BFOM value of 37.0 MV/cm ² in PINDs demonstrates that substrate removal technology is an effective way for GaN-based PIND fabrication on Si substrates. Relative to other technologies, however, the more complicated fabrication process and higher production cost are issues that must be addressed during the substrate removal part.

As an alternative technical route, PNDs on Si substrates are fabricated with quasi-vertical or vertical device structures. To mitigate the substantial material mismatch between the Si substrate and GaN epitaxial stacks, a more effective epitaxial technology must be investigated. For a higher BV , thicker drift layer is also essential for a higher BV . This fact presents another key issue to investigate because the drift layer thickness on Si substrate is approximately 5 µm.

Future Challenges and Conclusion

Vertical PNDs are essential to simultaneously obtain high current (> 100 A) with high voltages (> 600 V), which can meet the requirements of several applications including electric vehicles and recycled energy processing. Despite the great progress achieved, applications of vertical GaN PNDs remain several barriers such as cost and technical limitations.

For FS-GaN substrate, high epitaxial quality with low threading dislocation has been achieved by a common MOCVD. The small size and high cost of the FS-GaN substrate confine the applications of the vertical GaN PNDs within a narrow range, and the small size also raises the price of GaN. The commercial GaN substrate is only 2-inch and is much smaller than 4–6 inch SiC and 8–12 inch Si substrates. The primary challenge for vertical GaN PNDs is achieving high epitaxial quality, especially the high quality of the p -GaN layer with a high hole concentration. Recently, novel PNDs are proposed through replacing p -GaN with NiO_x synthesized by thermal oxidation or sputtering; great performance is also demonstrated as replacement of p -GaN in vertical PND and guard ring in GaN SBD [95,96,97,98].

Vertical GaN PNDs, as one of the most promising power devices, are reviewed and summarized in this study. The recent progresses on vertical GaN PNDs, including comparison of different materials (SiC vs. GaN) and different device structures (SBD versus PND), material epitaxy growth and edge termination techniques (FP, MESA, ion implanted and GR edge terminations), are discussed. R의 값 _켜기 versus BV by varied technologies are plotted in Fig. 11. Aside from the epitaxial technologies, edge termination technologies play a key role for vertical GaN PNDs to achieve high device performance at this stage. Despite its great progress in terms of device performance, the advantages of vertical GaN PNDs remain under-exploited. The characteristics of vertical GaN PNDs could be promoted by optimizing the device structure and epitaxial quality in succeeding studies. Then, commercialized vertical GaN PNDs will soon be available in the future with mature edge termination and epitaxial techniques.

Benchmarking of the R _켜기 versus BV of quasi- or full-vertical GaN PNDs

데이터 및 자료의 가용성

현재 연구 중에 사용되거나 분석된 데이터 세트는 합당한 요청이 있는 경우 교신저자에게 제공됩니다.

약어

GaN:

gallium nitride

SiC:

silicon carbon

PND:

PN junction diode

PIND:

P-i-N junction diode

SBD:

Schottky barrier diode

IGBT:

insulated gate bipolar transistors

BJT:

bipolar junction transistor

MOSFET:

metal oxide semiconductor field effect transistor

BFOM:

Baliga’s figure of merit

HFET:

heterostructure field-effect transistor

JFET:

junction field-effect transistor

2DEG:

two-dimensional electron gas

BV:

breakdown voltage

FS:

free-standing

MOCVD:

metalorganic chemical vapor deposition

MBE:

molecular beam epitaxy

JBS:

junction barrier Schottky

MPS:

merged PN Schottky

LED:

light-emitting diode

HVPE:

hydride vapor phase epitaxy

FP:

field plate

TD:

threading dislocation

MOVPE:

metalorganic vapor phase epitaxy

HEMT:

high electron mobility transistor

UHPA:

ultra-high-pressure annealing

GR:

guard ring

ICP:

inductively coupled plasma

TCAD:

technology computer-aided design

TMAH:

tetramethylammonium hydroxide

양측 게이트 제어 S/D 대칭 및 교체 가능한 양방향 터널 전계 효과 트랜지스터의 구조적 매개변수 및 내부 메커니즘의 영향에 관한 연구 저전류 밀도에서 양자 효율 개선을 위한 InGaN 마이크로 LED 구조 설계